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MagJack vs. Discrete Magnetics: Integrated Jacks Win Board Area, Discretes Win Cost

The choice between an integrated MagJack and discrete magnetics is a trade between board area and unit cost: 

Key Takeaways

  • Integrated MagJacks win on board area, 100 Ω routing length and EMI containment; discrete magnetics win on unit cost and second-source flexibility.
  • IEEE 802.3 requires 1500 Vrms isolation between the cable side and the device for 10/100/1000BASE-T ports, on either side of the connector boundary.
  • Power over Ethernet draws current through the magnetics' center taps — 350 mA for IEEE 802.3af Type 1 and 600 mA per pair set for IEEE 802.3at Type 2.
  • The most common second-source failure is a mismatched center-tap topology: voltage-mode and current-mode PHYs need different internal connections, and the footprint hides the difference.
  • Discrete designs give you two independent supply chains, so the transformer can be re-sourced without touching the connector footprint.

Engineering rule of thumb: at one or two ports in a tight enclosure, integrate; at high port count and high volume, go discrete.

What Ethernet Magnetics Actually Do

Every IEEE 802.3 twisted-pair port needs magnetics between the PHY and the cable. The isolation transformer provides the 1500 Vrms galvanic barrier the standard requires between the medium-dependent interface and the device, and couples the differential signal while rejecting the common-mode voltage difference between equipment on different grounds. A common-mode choke in the same package attenuates noise that would otherwise radiate from the cable.

Two parameters decide whether they do those jobs. Turns ratio is typically 1CT:1CT — a center-tapped winding on each side at unity ratio. Open-circuit inductance (OCL) sets the low-frequency droop and is specified under DC bias, because bias current pushes the core toward saturation; 100BASE-TX magnetics are commonly specified at 350 µH or more with 8 mA of bias. Both windings terminate a 100 Ω Ethernet twisted-pair impedance channel, so the magnetics sit inside the impedance-controlled path.

None of that disappears when a jack is called "integrated" — the magnetics move inside the connector housing, and with them the ownership of layout, qualification and sourcing.

The Integrated Case: What a MagJack Buys You

An integrated MagJack replaces three things with one: the 8P8C footprint, the separate magnetics footprint, and the differential routing between them. The third matters most: the PHY-to-magnetics segment is the most layout-sensitive part of the channel, carrying the full differential signal at the tightest impedance tolerance while sitting closest to the host board's digital noise. The shielded shell helps for the same structural reason: the magnetics sit inside a metal body already bonded to chassis ground, containing fields a board-mounted transformer would radiate into nearby traces.

Qualification is the second advantage. A reputable integrated part is characterized as an assembly — insertion loss, return loss, crosstalk and hipot measured through connector and magnetics together. Combine a plain jack with a separate transformer and that combination is yours to characterize — which is why catalogues of integrated-magnetics RJ45 connectors are organized by speed grade, port count and PoE type.

The Discrete Case: When Separate Magnetics Win

Unit cost comes first. A plain 8P8C jack plus a separate magnetics module is usually cheaper per port than an integrated part at the same speed grade, and the gap widens with port count: a front panel built from ganged RJ45 jacks without magnetics plus a magnetics array lands well below the same count of integrated ports, which is why high-density networking equipment is predominantly discrete.

The second reason is that discrete splits one decision into two independent ones. If the transformer goes on allocation you change the transformer and the footprint never moves; with an integrated part, a replacement must match footprint and internal schematic at once. The same freedom applies to PHY matching: the discrete menu is far wider, so you can pick a transformer whose center-tap arrangement, OCL and bias rating match your PHY's reference design exactly. In an integrated jack that schematic is fixed — you select around it rather than specifying it.

The Schematic and Footprint Checks to Run on Your Own Design

Four checks separate a working magnetics decision from a board respin. Re-run them whenever either part changes.

  • Center-tap topology against your PHY's drive mode. A current-mode transmitter generally needs the PHY-side center tap tied to a supply; a voltage-mode transmitter generally needs it floating or AC-terminated. Compare the jack's internal schematic pin by pin against the PHY reference design: two parts with identical footprints can differ here, and the symptom is degraded return loss, not an obvious failure.
  • OCL at your actual DC bias, not the headline number. If the design pushes DC through the windings — a PoE powered device, or a current-mode PHY — read OCL at that bias current. A part that meets its specification at 8 mA can sag well below it at PoE bias levels.
  • Where the cable-side termination lives, and how many paths it reaches chassis by. One common practice terminates the four cable-side center taps through a resistor network into a capacitor to chassis ground. An integrated jack may do this internally, pin it out, or bond it to the shell; a discrete design puts it on your board. Confirm there is exactly one intended path to chassis, not two.
  • The 1500 Vrms boundary on the layout. Trace it as a line across the board and check every crossing: copper, vias, mounting holes, LED traces and shield tabs crossing with insufficient clearance defeat the isolation the magnetics provide. On an integrated jack that boundary sits at the part edge; on a discrete design it runs between jack and transformer, which makes the clearance yours.

Need the Footprint Before You Commit the Layout?

Our RJ45 cross-reference covers 3,703 part numbers from 32 manufacturers, so you can check a drop-in equivalent against your existing footprint before requesting samples.

How Power over Ethernet Changes the Math

PoE current flows through the magnetics, so the power class changes the comparison. IEEE 802.3af Type 1 delivers 15.4 W at the source and 12.95 W at the device at 350 mA. IEEE 802.3at Type 2 raises that to 30 W and 25.5 W at 600 mA per pair set. IEEE 802.3bt Types 3 and 4 move to four-pair powering at 60 W and 90 W at the source, 51 W and 71.3 W at the device, across classes 0 to 8.

That current biases the core, reducing OCL, and heats it — manageable either way at Types 1 and 2. At Types 3 and 4 the integrated case strengthens: the vendor has characterized center-tap current rating and thermal behavior for the assembly, while a discrete design leaves that analysis with you. The counter-pressure is sourcing: integrated parts span most of an RJ45 jack and MagJack line, but the interchangeable pool narrows as power class rises.

Integrated MagJack vs. Discrete Magnetics: Comparison Table

Design Factor Integrated MagJack Discrete Magnetics + Plain 8P8C Jack
PCB Area per Port One connector footprint Jack footprint plus a separate magnetics footprint
Length of 100 Ω Differential Routing Shortest — magnetics sit inside the connector body Longer — PHY-side pairs run from jack to transformer on your board
1500 Vrms Isolation Boundary Inside the connector; the part edge is the boundary On your PCB, between jack and transformer — your clearance to own
EMI Containment Magnetics enclosed by the shielded connector shell Magnetics exposed on the board; needs layout and shielding attention
PoE Center-Tap Current Rating Characterized by the vendor as one assembly You verify it against 802.3af/at/bt — 350 mA to 600 mA per pair set and above
Center-Tap Topology Flexibility Fixed by the internal schematic Selectable — match the PHY's voltage-mode or current-mode reference design
Relative Unit Cost per Port Higher Lower, and the gap widens with port count
Second-Source Options Fewer — a replacement must match footprint and internal schematic together Two independent supply chains; re-source either side separately
Qualification Effort Lower — insertion loss, return loss, crosstalk and hipot characterized as a unit Higher — you characterize the jack-plus-magnetics combination

Frequently Asked Questions

What do Ethernet magnetics actually do?

Ethernet magnetics provide the 1500 Vrms galvanic isolation IEEE 802.3 requires between cable and device, couple the differential signal while rejecting common-mode voltage, and attenuate common-mode noise through an integrated choke. They are typically 1CT:1CT transformers whose open-circuit inductance is specified under DC bias, because bias current drives the core toward saturation.

Do I still need magnetics if my PHY has integrated isolation?

Almost always yes — check what the datasheet means by "integrated." Most PHYs integrate termination, biasing or ESD structures, not the 1500 Vrms transformer barrier, and the isolation requirement applies to the port regardless of what sits inside the silicon. Transformerless designs exist, but each is a deliberate architecture with its own isolation strategy, not a default.

Does PoE change whether I should use an integrated MagJack?

Yes — the higher the power class, the stronger the case for integration. At IEEE 802.3bt Types 3 and 4, with 60 W and 90 W at the source across four pairs, center-tap current rating and thermal behavior become design-critical, and an integrated part arrives with both characterized.

Can I replace a Bel Fuse or Halo MagJack with a drop-in equivalent without a board respin?

Often yes, but footprint compatibility alone is not sufficient evidence. The replacement must also match on pin assignment, internal schematic including center-tap topology, OCL and bias rating, PoE current rating, shield-tab position and LED configuration — a part that drops into the footprint but biases the center taps differently will degrade return loss. An RJ45 cross-reference tool is the fastest way to shortlist candidates by original part number, and mechanical drawings and samples for verification are available on request.


The decision comes down to board area and routing length, the EMI schedule, the PoE class you must carry, and how much second-source freedom the program needs. Integrate when area, routing and emissions dominate; stay discrete when unit cost, port density and sourcing flexibility dominate. Brand names and part numbers are trademarks of their respective owners and are used only to identify compatible parts.

Michael Wang - Senior Technical Engineer

About the Author

Michael Wang

Senior Technical Engineer

As the technical lead at TeleWire, Michael bridges the critical gap between complex engineering requirements and precision manufacturing. With deep expertise in Design for Manufacturing (DFM) and signal integrity, he oversees the technical validation of custom interconnect solutions for mission-critical automotive, industrial, and medical applications.

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